SystemC#662
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…al/instance naming routine names
Introduces a singleton service registry (ModuleServices) that provides a unified query surface for DevTools and inspection tools. Module.build() now registers the root module with ModuleServices.instance. Also adds SvService which wraps SystemVerilog synthesis and registers with ModuleServices for DevTools access to SV metadata. This is a clean separation: no netlist code is included. The netlist branch will later extend ModuleServices with a netlistService field.
Change _scLineMap value type from Map<String,String> to Map<String,List<String>> so each name carries the declaration plus every subsequent assignment LHS line found in the generated text. The single-pass tokenizer now appends a position whenever an identifier is followed by '=' (and not '=='), enabling downstream FLC tracing to expose multiple cross-probe points per signal. - Drop the early-out on _scLineMap.length == targets.length (incompatible with collecting all assignments). - De-duplicate within each name's list. - Update existing scLineMap tests to walk lists. - Add a multi-entry test exercising a Combinational module that drives the same output from two If/Else arms.
# Conflicts: # tool/gh_codespaces/install_dart.sh
The 9bbe55d 'merge new-dart' commit was made with 19 unresolved conflict markers still in the file, causing 512 analyzer errors and cascading test failures. Resolved all blocks taking HEAD (systemc) side throughout.
Uses Directory.systemTemp which triggers _Namespace on non-VM platforms. Matches the pattern used in wave_dumper_test.dart and vcd_parser_test.dart.
Each SystemC test file that compiles binaries (SystemCExecutable) now calls tearDownAll(() => SimCompare.cleanupSystemCCache(keepPch: false)) so every temp directory it created is deleted when the test file finishes. Previously only systemc_vector_test.dart had this teardown; the other four files left their compiled binaries and temp dirs in tmp_test/, failing the check_tmp_test.sh CI step. Files fixed: - systemc_simcompare_test.dart - systemc_struct_naming_test.dart - logic_array_sim_test.dart - systemc_ffi_cosim_test.dart
Add SystemCFfiCosim.cleanupCache() static method that deletes cosim_ffi_* and libcosim_ffi_* files from tmp_test/ and clears the in-process library cache. Use it in systemc_ffi_cosim_test.dart tearDownAll instead of the missing SimCompare reference.
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Description & Motivation
We should have a SystemC translation of our ROHD modules to simulate in a SystemC environment.
Related Issue(s)
None.
Testing
Leverage iverilog tests to drive SystemC testing, except for somethings like lack of 'X' propagation.
Backwards-compatibility
No.
Documentation
Very basic documentation added to parallel SystemVerilog.